Photonic integrated circuits are rapidly advancing in several applications, such as datacom, RF, sensing, automotive and medical. Validated, unified Electronic/Photonic Design Automation (EPDA) tool flows are key to commercializing silicon photonics for these applications.
5G is rapidly changing the communication landscape, and integrated photonic devices like PAM-4 transceivers, will play a central enabling role. In this webinar, Cadence Distinguished Engineer Gilles Lamant and Lumerical CTO James Pond introduce a PDK based design flow built on Cadence’s Virtuoso Design Environment and Lumerical’s INTERCONNECT. A demonstration will show close integration between schematic capture, electronic-photonic co-simulation, and layout tools, together with electronic/photonic PDKs to deliver silicon proven 5G designs.
Like other emerging technologies, PAM-4 requires a combination of electrical and optical systems in silicon, which are often implemented in multiple process technologies, providing many unique challenges when designing today’s complicated PICs. Cadence and Lumerical worked together to deliver an electro-optical photonic reference flow based on the industry-standard Cadence® Virtuoso® electronic/photonic design automation (EPDA) environment and Lumerical’s INTERCONNECT that supports photonic and electronic process design kits (PDKs). Learn about a flow for designing, implementing, and verifying PAM-4 and other complicated PICs including:
- Electrical and photonic schematic capture in the Virtuoso Schematic Editor
- Electro-optical co-simulation in the Virtuoso Analog Design Environment, using Spectre® AMS Designer and Lumerical INTERCONNECT
- Photonic layout implementation in the Virtuoso Layout Suite environment:
- Schematic-driven layout, using a single golden schematic for both electrical and optical domains
- Implementation of complex photonic SKILL® PCells and advanced photonic layout generators built upon the Virtuoso CurvyCore™ infrastructure
- Waveguide parameter back-annotation to schematic for layout-accurate optical re-simulation
- Photonic component parameter and model generation for custom components
- Co-design of the electronic and photonic components for hybrid systems.
Attendees will be introduced to commercial photonics processes and a PDK based design flow supporting PAM-4 for datacenter and 5G applications, followed by an overview of a unified Electronic/Photonic Design Automation (EPDA) tool flow including details on codesign and cosimulation, as well as photonic specific compact model libraries (CMLs).
Get Ready for 5G with Cadence/Lumerical PAM-4 Reference Flow
January 15, 2020 10:00 am
(America/Vancouver -07:00 GMT)