Siemens EDA Interoperability

The Ansys Lumerical and Siemens EDA integrated design flow equips circuit and system designers with the tools they need to produce production level photonic integrated circuits. Ansys and Siemens EDA work with foundries to provide validated PDKs complete with component layouts and calibrated compact models. The layout-driven flow offered today includes circuit layout in Tanner L-Edit Photonics complemented by Siemens EDA LightSuiteTM Photonic Compiler, physical verification with Siemens EDA Calibre nmDRC, and circuit simulation with Lumerical INTERCONNECT.

PDK-centered design flow

The centerpiece of the workflow is the foundry Process Design Kit (PDK). This contains both the Tanner L-Edit OA Based Layout of the PDK components and the Compact Model Library (CML) based in Lumerical INTERCONNECT. The CML provides component models that are calibrated to the foundry process and serve as the counterpart to the layout components.

Circuit level design, simulation and verification

Circuit and system designers layout their circuit using Tanner L-Edit Photonics and LightSuite Photonic Compiler. Tanner L-Edit Photonics is used to extract a netlist that describes the circuit components and connections. The netlist is imported into Lumerical INTERCONNECT, and a circuit is generated based on the compact model library component counter-parts with the appropriate connections. Users create test benches around the circuit, including sources and analyzers to simulate the performance. Once the designer has reached an optimized circuit, Calibre nmDRC is run for physical verification.

INTERCONNECT circuit solver

  • Frequency domain analysis
  • Transient sample and block mode simulators
  • Multi-mode and multi-channel support
  • Built-in analysis tools

Component level design and simulation

Component level tools support component designers and foundries in developing their PDK. Design is guided by numerical optical and multi-physics simulations with Ansys Lumerical component tools including Lumerical FDTD, Lumerical MODE, Lumerical CHARGE, and Lumerical HEAT. Tanner L-Edit, Calibre nmDRC and Calibre LFD are used together to create validated layouts. Furthermore, results extracted from component level simulations are used alongside experimental data to build calibrated compact models in Lumerical INTERCONNECT.

What are my next steps?

Contact our team to trial Tanner EDA Interoperability:

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